Options specific to the Chamois version of CompCert
This html page is automatically generated by command ccomp [-]-help-chamois-html. Use -fno-`opt` to turn off -f`opt`.
Optimization options:
-finline-auto-threshold n: Inline functions under size n-ftailrec: Turn tail calls to same function into loops [on]-fcse2: Perform inter-loop CSE2 [off]-fcse3: Perform inter-loop CSE3 [on]-fcse3-alias-analysis: Perform inter-loop CSE3 with alias analysis [on]-fcse3-across-calls: Propagate CSE3 information across function calls [off]-fcse3-across-merges: Propagate CSE3 information across control-flow merges [on]-fcse3-glb: Refine CSE3 information using greatest lower bounds [on]-fcse3-trivial-ops: Replace trivial operations as well using CSE3 [off]-fcse3-refine: Refine CSE3 invariants by descending iteration [on]-fcse3-conditions: Remove redundant conditions using CSE3 [on]-mtune=: Type of CPU (for scheduling on some architectures)-fprepass: Perform prepass scheduling (only on some architectures) [on]-fprepass= `optim`: Perform prepass scheduling with the specified optimization [regpres] (`optim`=list: list scheduling, `optim`=revlist: reverse list scheduling, `optim`=regpres: list scheduling aware of register pressure, `optim`=regpres_old: old variant of regpres, `optim`=bnb: branch and bound approach, `optim`=mris: list scheduling with minimum register instruction sequence, `optim`=mris_lazy: lazy version of the mris scheduler, `optim`=mris_ren: like mris, but virtual registers are renamed, `optim`=zigzag: zigzag scheduling, `optim`=ilp: ILP, `optim`=greedy: just packing bundles)-fprepass-alias-rel: Use alias analysis for relative addressing during prepass scheduling [on]-fprepass-alias-abs: Use alias analysis for abstract absolute classes of addresses during prepass scheduling [on]-fprepass-print-makespan: Print makespan information during prepass scheduling-regpres-threshold n: With `-fprepass= regpres`, set threshold value for number of free registers before trying to decrease register pressure-fregpres-wait-window: When register pressure is high, use a 5-cycle waiting window instead of scheduling short paths first [off]-fpostpass: Perform postpass scheduling on aarch64 and kvx [on]-fpostpass= `optim`: Perform postpass scheduling with the specified optimization [list] (`optim`=list: list scheduling, `optim`=ilp: ILP, `optim`=greedy: just packing bundles)-fcoalesce-mem: Perform load pairing by peephole on aarch64 and kvx [on]-fexpanse-rtlcond: Expanse branches on riscv [on]-fexpanse-others: Expanse operations on riscv [on]-fshort-branches: Use short branches when available (experimental) [on]-flct: Run the Lazy Code Transformations oracle [on]-flct-trap: Support trapping operations in LCT [on]-flct-sr: Support strength-reduction in LCT for riscv [on]-flct-tun: Activate a tunneling pass after LCT [off]-flct-tlimit: Limit the LCT oracle runtime (in seconds) [0]-flct-nlimit: Limit the LCT oracle number of candidates [64]-flct-promote: Promote some instructions into their long variants [on]-flct-alias-abs: Use alias analysis for abstract absolute classes of addresses during LCT [on]-fstore-motion: Run the store motion pass [off]-fstore-motion-alias-abs n: Use the alias analysis during the store motion pass [1] (n=0:no analysis; n=1:load-store reordering; n=2:load-store and store-store reordering)-fpredict: Insert static branch prediction information [on] Also swaps ifso/ifnot branches accordingly at RTL level-ftailduplicate n: Perform tail duplication for RTL code blocks of size n (not counting Inops) [0]-ftracelinearize: Uses branch prediction information to improve the Linearize [on]-funrollsingle n: Unrolls a single iteration of innermost loops of size n (not counting Inops) [0]-funrollbody n: Unrolls once the body of innermost loops of size n (not counting Inops) [0]-flooprotate n: Duplicates the header (condition computation part) of innermost loops to perform a loop rotate [0] Doesn't duplicate if the size of that header is strictly greater than n-fforward-moves: Forward moves after CSE [on]-freg-renaming: Register renaming [off]-freg-renaming= `policy`: Register renaming [backward] (`policy`=forward: forward renaming, `policy`=backward: backward renaming)-fif-lift: If-lifting scheduling [off]-fif-lift= `policy`: Apply if-lifting scheduling. It moves certain instructions over conditions. If lifting is disabled by default [movstores] (`policy`=movstores: moves stores, `policy`=passlive: stores are fixed)-fif-lift-ratio n: Ratio for controlling if-lifting code duplication length (only applies when -fif-lift is active). By default, always applies if-lifting [0]-fschedule-compense: Compensated blocks also get scheduled [on]-ffactorize: Factorizes the program on code duplications [off]-freduce-memcpy: Try to strength-reduce memory copy operations [on]
Code generation options:
-fleaf: Optimize leaf functions [on]-fcommon: Put uninitialized globals in the common section [on]-fprofile-arcs: Profile branches [off].-fprofile-use= filename: Use profiling information in filename-fbranch-probabilities: Use profiling information (if available) for branches [on]-fbranch-threshold: Take into account branch counts only above this [100]-fbranch-delta: Take into account branch count difference above this fraction [0.2]-fbranch-target-protection: Branch target protection on targets supporting it [on]-fretaddr-pac: Return address authentification/protection on targets supporting it [on]-ffinal-renumber: Renumber before register allocation [on]-fmax-alloc-rounds `n`: Set maximal number of spilling iterations in register allocation [40]-finterval-prop: Perform global interval propagation [on]-fstack-protector: Add "canaries" to functions-fstack-protector-all Force adding "canaries" to all functions (needs -fstack-protector): -fsecu-opaque-copies: Use opaque copies to protect countermeasures [on]-fsecu-dup-loads: Duplicate well defined loads [on]-fsecu-cfc: Add intra-procedural control-flow checking to marked functions [on]-fsecu-cfc-return: Add intra-procedural control-flow checks before returns [off]-fsecu-cfc-all: Add intra-procedural control-flow checking to all functions [off]-fsecu-ip-cfc: Add inter-procedural control-flow checking to all functions [off]